Opinion | The Hidden Architecture Of The Chip Economy

Aditya Vikram Kashyap

India's advantage is not that it controls the stack. It is that it has spent decades quietly learning one of the stack's most valuable layers

The most important thing about the chip in your phone is not what it does. It is how long it took to make.

Not the chip itself. That takes a few months from order to delivery. The patience the chip required is older. It is older than your phone, older than the company that designed it, older than your country’s investment in semiconductors. Embedded in every modern logic chip is roughly 40 years of accumulated industrial waiting. Mirrors slowly polished in Oberkochen. Photoresist recipes refined across decades in industrial parks outside Osaka. Process engineers staying at one fab for two decades, learning how a particular tool behaves on cold mornings versus warm ones. Supplier relationships negotiated across three generations of executives. The chip is the most ordinary object in your life. It is also the product of the most patient industrial system human beings have ever built.

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This patience is now under strain.

In January 2019, a single batch of a specialty chemical called photoresist arrived at TSMC’s Fab 14B in Tainan with something subtly wrong in its molecular structure. By the time engineers noticed, as many as 30,000 silicon wafers had been ruined and the factory had taken a $550 million hit to a single quarter’s revenue. The story is usually filed under supply-chain fragility. It is more accurately a story about time. The dollar figure is the cost when patience fails for ten seconds. The recovery, completed within weeks, was a measure of how much patience had been built up around it.

The pattern repeats up and down the chain. A workshop in Oberkochen run by Zeiss SMT produces optical mirrors so flat that any deviation is measured in fractions of a nanometer. Without those mirrors, no extreme-ultraviolet lithography machine could direct light onto a silicon wafer. Without those machines, made by the Dutch firm ASML, no chip below seven nanometers can be manufactured. A single Zeiss coating took fifteen years to develop; engineers worked on it, retired, and were replaced by colleagues who continued the work. Three Japanese firms produce roughly 90 per cent of the high-end photoresist chemicals. Until Russia’s invasion, two Ukrainian plants supplied roughly half the world’s semiconductor-grade neon. Each capability is the slow harvest of decisions taken decades ago and honored, against shifting governments and changing markets, ever since.

This is why subsidies are necessary but insufficient. The American CHIPS Act commits roughly $52 billion in manufacturing incentives. The European Union has matched it. Japan, Korea, and India run parallel programmes. Capital can buy construction. It cannot buy the rest. A chip factory is not a building. It is a living organism of recipes, calibrations, trained engineers, and supplier relationships compressed into a fifty-kilometer radius around a single facility. An ASML machine integrates components from more than 800 suppliers. Qualifying a new specialty gas supplier can take three to eighteen months, because each fab’s process is tuned to its supplier’s exact impurity profile. You can appropriate the billions. You cannot appropriate the fifteen years.

Reshoring the factory reshores the flag. It does not reshore the supply chain beneath it.

This is the deeper architecture of the present semiconductor contest, more distributed than the headlines suggest. The United States retains formidable strengths in design tools, capital markets, and the leading chip companies, while rediscovering the cost of rebuilding industrial time. Europe holds indispensable positions in lithography and precision optics, even as it struggles with internal coordination. China has compressed semiconductor learning at extraordinary speed, but compression is not yet the same as accumulated ecosystem maturity. Japan and Korea remain irreplaceable in materials and memory. Taiwan, through TSMC and its supplier cluster, sits at the center of advanced manufacturing, producing more than 70 per cent of the world’s foundry chips. No single country is replaceable. None is sufficient.

This is the picture into which India is now entering, and where it is most often misunderstood. India is not yet a manufacturing power in semiconductors. Its strength today lies in a different layer of the stack. Roughly 20 per cent of the world’s chip-design engineers, about 125,000 of them, work in India. Texas Instruments opened its Bengaluru center in 1985. Intel, NVIDIA, Qualcomm, AMD, and Synopsys followed. Indian engineers have spent four decades working on the design, verification, and embedded-systems layer of the global chip economy, building one of the most experienced design ecosystems anywhere. India’s advantage is not that it controls the stack. It is that it has spent decades quietly learning one of the stack’s most valuable layers.

The challenge ahead is to convert design depth into ecosystem depth. Micron is constructing a $2.75 billion assembly and test facility in Sanand, Gujarat, the largest American semiconductor investment in India to date. Indian government incentive schemes are pulling foreign equipment makers and assembly partners into deeper engagement. None of this displaces Taiwan or replaces ASML, and none of it should be described as if it does. What it begins to do is move India from a position central to execution but peripheral to value capture into a more visible role across packaging, testing, materials, and trailing-edge manufacturing. The hard work is execution: standards, supplier development, intellectual-property capture, and the long task of qualifying suppliers at scale. Those are not problems money solves. They are problems patience solves.

There is a moral dimension here that should be stated carefully, because the careless version does the argument harm. The global semiconductor system, like most twentieth-century industrial systems, has rewarded ownership, intellectual property, and manufacturing more generously than it has rewarded distributed engineering labor. Indian engineering depth has been central to execution but less visible in the ownership layer. This is not a story of grievance. It is a structural observation: value capture has lagged value creation. Whether that gap narrows depends less on rhetoric than on whether countries with under-leveraged technical depth, India among them, build the institutional and industrial scaffolding that converts contribution into durable position.

A cleanroom in Hsinchu, a lithography hall in Veldhoven, an optics shop in Oberkochen, a gas plant outside Ulsan, a design floor in Bengaluru, a packaging line under construction in Sanand. Six rooms, six different speeds, none sufficient alone. The chip in your phone is the small physical product of all of them. The interesting question for the next decade is not who wins, because in a system this distributed, winning is the wrong vocabulary. It is which countries learn to recognise the patient labour the rest depends on, and which manage, with discipline rather than slogans, to convert accumulated patience into durable industrial architecture.

Aditya Vikram Kashyap is currently Vice-President at Morgan Stanley, New York. Kashyap is an award-winning technology leader. His core competencies focus on enterprise-scale AI, digital transformation, and building ethical innovation cultures. Views expressed are personal and solely those of the author, and do not necessarily reflect News18’s views.

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